Commit graph

184 commits

Author SHA1 Message Date
hexkyz
3db9ce32fa Fusee: Deployed new SDMMC driver in fusee-secondary. All stages boot now.
Fusee: Fixed wrong argument in se.c function.
Fusee: Improved timers.
2018-07-19 21:07:53 +01:00
hexkyz
3394f0cf0d
Merge pull request #161 from TheDgtl/fix_4xx_kernel
Fix issue with fusee-secondary 4.x kernel patches
2018-07-04 22:06:11 +01:00
hexkyz
c5e9aec013 fusee: Temporarily disable anything that prevents the fusee-primary to fusee-secondary transition. 2018-07-04 22:04:41 +01:00
Drakia
6ab81e1780 Fix issue with fusee-secondary 4.x kernel patches 2018-07-01 17:50:02 -07:00
Benoit7413
0f6d4baa8e
Replace NAND by eMMC
Using NAND doens't really make sense
2018-06-26 08:49:50 +02:00
Michael Scire
9687218fbc Fusee: lfs kernel patches for 3.0.0/3.0.2 2018-06-24 16:24:22 -06:00
Michael Scire
1252c4d5e1 Fusee: Complete hashes (Thanks @Thog), lfs patches for 2.0.0 2018-06-24 15:51:29 -06:00
Michael Scire
040cfa90d3 Fusee: Add kernel patches for 1.0.0. 2018-06-24 15:20:16 -06:00
Drakia
a446aca2c4 Fix a few issues in the secondary kernel_patches.c file 2018-06-17 19:28:19 -07:00
hexkyz
fca9ed2a15
Merge pull request #145 from Traiver/master
fusee: Add 4.1.0 kernel patch definitions
2018-06-17 16:56:36 +01:00
Traiver
33af704ee2
Update kernel_patches.c 2018-06-17 15:54:06 +02:00
Traiver
57819fa345
Update kernel_patches.c 2018-06-17 14:02:08 +02:00
Traiver
0295c8a51d
Update kernel_patches.c 2018-06-17 12:38:57 +02:00
Traiver
b211a7cf05
add kernel patches for 4.1.0 2018-06-17 11:00:42 +02:00
DavidBuchanan314
20a721a4a6 fusee: correct 4.x free_code_space_offset value 2018-06-13 22:26:00 +01:00
DavidBuchanan314
58d2f8f0a5 fusee: Add 3.0.0-3.0.1 kernel hash (and free_code_space_offset) 2018-06-13 22:08:18 +01:00
Tomasz Moń
206c10f333 Rework sdmmc clocking configuration
Use 204 MHz as host clock in SDR104 mode instead of 136 MHz.
Due to this, also change the frequency init divider so the
initialization frequency is below 400 kHz.
This makes the clocks for SDMMC1 in all modes to match the TRM table.

Make it clear in the code that HS200/HS400 modes in fact use PLLP_OUT0
and not PLLC4_OUT2_LJ like the comment suggest. In fact selecting the
PLLC4_OUT2_LJ as clock source results in freeze after switching to
HS200/HS400 mode. This is most likely related to the PLLC4 not being
enabled, but it should be checked later.

Set the HS200/HS400 divider to 3, as this is what the code really did
set prior to this change - so this commit does not change that.

Configure Legacy 12 MHz clock to run at 12 MHz using the SW default
configuration (as per TRM) for the SDMMC legacy timer.

Introduce initial version of sdmmc_host_clock_delay() in order to use it
in places where the wait is host clock dependent. The way it is
implemented now does not change the sleep that was used instead.
2018-06-12 17:20:15 +02:00
Max K
d8c9399cff fusee: Run periodic autocal only on the uSD controller (#137) 2018-06-10 21:09:48 -07:00
hexkyz
ceb93867b4
Merge pull request #132 from tslater2006/master
Add sdmmc_dump_regs function
2018-06-10 16:21:18 +01:00
Tomasz Moń
804a40830e Fix race conditions and misconfiguration in sdmmc
Properly configure pull up and pull down offsets for autocal.
Run autocal prior to every transfer.

Prevent race conditions in sdmmc_wait_for_event() - make sure the fault
handler has highest priority, then the target irq, state conditions and
finally the error mask.

Do not clear all bits (|=) when acknowledging fault conditions,
only acknowledge the fault conditions itself.

Enable interrupts before preparing command registers - if sdmmc is fast
enough it can actually finish transfer before we enabled the interrupts.
Enabling interrupts clears the COMMAND COMPLETE status bit.

Temporarily print all the sdmmc messages in stage2 - for yet unknown
reason respecting the log level results in some failures.

This results in working microsd card in stage2 on my switch with Samsung
EVO+ 256GB microsd card.
2018-06-09 17:37:53 +02:00
Timothy Slater
a79d3454d8 Switched to mmc_debug, and use inttypes 2018-06-08 07:50:36 -05:00
Timothy Slater
7df8ca7c4b use printf instead of printk for secondary 2018-06-07 13:05:41 -05:00
Timothy Slater
ca907077af Add sdmmc_dump_regs function 2018-06-07 12:55:29 -05:00
Tomasz Moń
7b9dcd2f1a Make sdmmc autocalibration follow TRM procedure
Sleep for 1 us, not 1 ms.
Timeout after 10 ms, set driver strength code values according to TRM.

Fix typo (mS) - time is in milliseconds, not milliSiemens.
2018-06-05 19:07:14 +02:00
TuxSH
0491a21a99 Fix logic bug in stage2's main function 2018-06-05 16:18:02 +02:00
Max K
6b7da2887f package2 verification and ini1 merging fixes (#125)
* fusee: Incremet offset while reading kip1s

* fusee: Pass package2 section data along with the decrypted metadata
2018-06-04 14:04:44 -07:00
TuxSH
b2139ed182 Pass screen status and mmc struct from stage1 to 2 2018-06-04 19:17:23 +02:00
hexkyz
7e5fda86b2
Merge pull request #114 from desowin/sdmmc-errata
Set SDMMC controller to SDR104 as a workaround
2018-06-04 16:20:19 +01:00
langerhans
41429e9120 fusee: Add kernel hash for 4.x 2018-06-03 16:59:21 +02:00
Michael Scire
968c86578a Fusee: Add 5.x kernel patches to allow for IPC PID mitm. 2018-06-02 20:01:44 -06:00
Michael Scire
cc69079d73 Fusee: Add mechanism for branching back at end of hook. 2018-06-02 19:11:50 -06:00
Max K
8ec3a53d73 Fix CCPLEX bringup and halt the BPMP once it's done booting. (#118) 2018-06-02 17:24:02 -07:00
Michael Scire
b3a7086b7e Fusee: Add infrastructure for applying kernel patches (needed for mitm) 2018-06-02 16:06:31 -06:00
Michael Scire
1ba8a92030 Fusee: Separate kernel patching into its own file. 2018-06-02 16:06:31 -06:00
Tomasz Moń
0534e36cf8 Set SDMMC controller to SDR104 as a workaround
According to Tegra X1 Series Processors Silicon Errata there is possible
misalignment of received data which results in a CRC error. The issue is
present only in SDR50 mode.
2018-05-27 17:43:25 +02:00
TuxSH
c9723d7b68 Refactor fusee's makefile 2018-05-27 00:59:02 +02:00
TuxSH
d57f4c54a9 Fix mmc->allow_voltage_switching assignment in sdmmc_init 2018-05-24 17:39:36 +02:00
TuxSH
4d43a86b60 Copy latest sdmmc driver to stage2 2018-05-24 01:17:13 +02:00
TuxSH
fd77e5543e Add debug comment for exosphère 2018-05-23 18:46:39 +02:00
TuxSH
16ad355f45 Unstub "Validate section hashes." 2018-05-23 18:45:53 +02:00
Michael Scire
c64d7904b4 Fusee: Fix se_calculate_sha256 2018-05-21 13:07:46 -06:00
TuxSH
561fa90669 Use uintX_t for the SE & copy bugfixed SE struct definition 2018-05-21 19:05:00 +02:00
TuxSH
f39622c421 Stage2: Fix bug, add more debug printfs to nxboot. The CCPLEX doesn't turn on 2018-05-21 18:42:42 +02:00
TuxSH
5920f5a4b0 Stage2: fix various bugs in package2.c 2018-05-21 18:18:12 +02:00
TuxSH
ffd0b5df6a Fix bug in stratosphere_get_ini1, etc. 2018-05-21 17:45:05 +02:00
TuxSH
0e9a304533 stage2: package2: bypass hash checks for now 2018-05-21 17:42:10 +02:00
TuxSH
bf2c6dff25 Stage2: Add exception handlers 2018-05-21 03:50:53 +02:00
TuxSH
83d9d874e6 Fusee use CAR reboot for fatal errors 2018-05-20 23:52:09 +02:00
TuxSH
4ec7d0fc82 Remove packed when not needed 2018-05-20 22:57:25 +02:00
TuxSH
57ff5e694a Don't check for panics in stage2 2018-05-20 22:00:11 +02:00