warmboot: add i2c code to enable PMIC

This commit is contained in:
Michael Scire 2018-12-17 16:48:14 -08:00
parent b419c0df29
commit 754aaecc18
4 changed files with 135 additions and 1 deletions

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@ -33,6 +33,8 @@
#define CLK_RST_CONTROLLER_SUPER_CCLKG_DIVIDER_0 MAKE_CAR_REG(0x36C) #define CLK_RST_CONTROLLER_SUPER_CCLKG_DIVIDER_0 MAKE_CAR_REG(0x36C)
#define CLK_RST_CONTROLLER_SUPER_CCLKP_DIVIDER_0 MAKE_CAR_REG(0x374) #define CLK_RST_CONTROLLER_SUPER_CCLKP_DIVIDER_0 MAKE_CAR_REG(0x374)
#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C5_0 MAKE_CAR_REG(0x128)
#define CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_REF_0 MAKE_CAR_REG(0x62C) #define CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_REF_0 MAKE_CAR_REG(0x62C)
#define CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_SOC_0 MAKE_CAR_REG(0x630) #define CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_SOC_0 MAKE_CAR_REG(0x630)
@ -52,6 +54,7 @@
#define CLK_RST_CONTROLLER_RST_DEV_H_SET_0 MAKE_CAR_REG(0x308) #define CLK_RST_CONTROLLER_RST_DEV_H_SET_0 MAKE_CAR_REG(0x308)
#define CLK_RST_CONTROLLER_RST_DEV_U_SET_0 MAKE_CAR_REG(0x310) #define CLK_RST_CONTROLLER_RST_DEV_U_SET_0 MAKE_CAR_REG(0x310)
#define CLK_RST_CONTROLLER_RST_DEV_H_CLR_0 MAKE_CAR_REG(0x30C)
#define CLK_RST_CONTROLLER_RST_DEV_U_CLR_0 MAKE_CAR_REG(0x314) #define CLK_RST_CONTROLLER_RST_DEV_U_CLR_0 MAKE_CAR_REG(0x314)
#define CLK_RST_CONTROLLER_RST_DEV_V_CLR_0 MAKE_CAR_REG(0x434) #define CLK_RST_CONTROLLER_RST_DEV_V_CLR_0 MAKE_CAR_REG(0x434)

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@ -21,6 +21,8 @@
#include "car.h" #include "car.h"
#include "timer.h" #include "timer.h"
#include "pmc.h" #include "pmc.h"
#include "misc.h"
#include "i2c.h"
#include "sysreg.h" #include "sysreg.h"
void cluster_initialize_cpu(void) { void cluster_initialize_cpu(void) {
@ -79,10 +81,15 @@ void cluster_initialize_cpu(void) {
CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_REF_0 = 0xE; CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_REF_0 = 0xE;
CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_SOC_0 = 0xE; CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_SOC_0 = 0xE;
/* Power on I2C5, wait 5 us. */ /* Power on I2C5, wait 5 us, set source + take out of reset. */
CLK_RST_CONTROLLER_CLK_ENB_H_SET_0 = 0x8000; CLK_RST_CONTROLLER_CLK_ENB_H_SET_0 = 0x8000;
CLK_RST_CONTROLLER_RST_DEV_H_SET_0 = 0x8000; CLK_RST_CONTROLLER_RST_DEV_H_SET_0 = 0x8000;
timer_wait(5); timer_wait(5);
CLK_RST_CONTROLLER_CLK_SOURCE_I2C5_0 = 0x4;
CLK_RST_CONTROLLER_RST_DEV_H_CLR_0 = 0x8000;
/* Enable the PMIC. */
i2c_enable_pmic();
/* TODO: This function is enormous */ /* TODO: This function is enormous */
} }

76
exosphere/lp0fw/src/i2c.c Normal file
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@ -0,0 +1,76 @@
/*
* Copyright (c) 2018 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "i2c.h"
#include "timer.h"
/* Prototypes for internal commands. */
void i2c_set_test_master_config_load(void);
void i2c_write(unsigned int device, uint32_t val, unsigned int num_bytes);
void i2c_send_byte_command(unsigned int device, unsigned char reg, unsigned char b);
/* Load hardware config for I2C5. */
void i2c_set_test_master_config_load(void) {
/* Set MSTR_CONFIG_LOAD. */
I2C_I2C_CONFIG_LOAD_0 = 0x1;
while (!(I2C_I2C_CONFIG_LOAD_0 & 1)) {
/* Wait forever until it's set. */
}
}
/* Writes a value to an i2c device. */
void i2c_write(unsigned int device, uint32_t val, unsigned int num_bytes) {
if (num_bytes > 4) {
return;
}
/* Set device for 7-bit mode. */
I2C_I2C_CMD_ADDR0_0 = device << 1;
/* Load in data to write. */
I2C_I2C_CMD_DATA1_0 = val;
/* Set config with LENGTH = num_bytes, NEW_MASTER_FSM, DEBOUNCE_CNT = 4T. */
I2C_I2C_CNFG_0 = ((num_bytes << 1) - 2) | 0x2800;
i2c_set_test_master_config_load();
/* Config |= SEND; */
I2C_I2C_CNFG_0 = ((num_bytes << 1) - 2) | 0x2800 | 0x200;
while (I2C_I2C_STATUS_0 & 0x100) {
/* Wait until not busy. */
}
while (I2C_I2C_STATUS_0 & 0xF) {
/* Wait until write successful. */
}
}
/* Writes a byte val to reg for given device. */
void i2c_send_byte_command(unsigned int device, unsigned char reg, unsigned char b) {
uint32_t val = (reg) | (b << 8);
/* Write 1 byte (reg) + 1 byte (value) */
i2c_write(device, val, 2);
}
/* Enable the PMIC. */
void i2c_enable_pmic(void) {
/* Write 00 to Device 27 Reg 00. */
i2c_send_byte_command(27, 0, 0x80);
}

48
exosphere/lp0fw/src/i2c.h Normal file
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@ -0,0 +1,48 @@
/*
* Copyright (c) 2018 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef EXOSPHERE_WARMBOOT_BIN_I2C_H
#define EXOSPHERE_WARMBOOT_BIN_I2C_H
#include "utils.h"
/* I2C_BASE = I2C5. */
#define I2C_BASE (0x7000D000)
#define MAKE_I2C_REG(ofs) (MAKE_REG32(I2C_BASE + ofs))
#define I2C_I2C_CNFG_0 MAKE_I2C_REG(0x000)
#define I2C_I2C_CMD_ADDR0_0 MAKE_I2C_REG(0x004)
#define I2C_I2C_CMD_DATA1_0 MAKE_I2C_REG(0x00C)
#define I2C_I2C_STATUS_0 MAKE_I2C_REG(0x01C)
#define I2C_INTERRUPT_STATUS_REGISTER_0 MAKE_I2C_REG(0x068)
#define I2C_I2C_CLK_DIVISOR_REGISTER_0 MAKE_I2C_REG(0x06C)
#define I2C_I2C_BUS_CLEAR_CONFIG_0 MAKE_I2C_REG(0x084)
#define I2C_I2C_BUS_CLEAR_STATUS_0 MAKE_I2C_REG(0x088)
#define I2C_I2C_CONFIG_LOAD_0 MAKE_I2C_REG(0x08C)
void i2c_enable_pmic(void);
#endif